1. Field of the Invention
The present invention relates in general to an electrical overstress (EOS) and electrostatic discharge (ESD) protection device on an integrated circuit (IC). In particular, the present invention relates to a bi-directional EOS/ESD protection component.
2. Description of the Related Art
As components of integrated circuits (ICs) become more delicate with growing capacities, the components also become more vulnerable to unexpected electrical overstress (EOS) and electrostatic discharge (ESD). EOS and ESD resilience is thus crucial for measuring reliability of ICs. It is common to have EOS/ESD protection circuits formed between input/output (I/O) ports or power lines to protect components of ICs from EOS/ESD events.
FIG. 1A shows a conventional EOS/ESD protection circuit implemented by a diode. FIG. 1B shows a voltage-current diagram of the circuit in FIG. 1A. When the voltage at a pad 10 exceeds a breakdown voltage Vbreak of the diode, the diode is triggered to release the stress at the pad 10 and protect an inner circuit 12.
FIG. 2A shows a cross section and equivalent symbols of components in a conventional semiconductor-controlled rectifier (SCR). FIG. 2B shows a voltage-current diagram of the SCR in FIG. 2A. FIG. 2C shows a conventional EOS/ESD protection circuit implemented by a SCR for an I/O pad 10. The voltage across the SCR is retained at a low holding voltage Vhold after triggering. Therefore, the SCR releases large current without being overheated.
As shown in the voltage-current curves in FIGS. 1B and 2B, the diode and the SCR are triggered when backward biased. That is, signals with negative voltages cannot be transmitted at the I/O pad 10 because of clamping of the diode and SCR. Simply put, signals at the structures in FIGS. 1A to 2C are allowed one way (greater than 0) only. When two-way signals (signals greater or smaller than 0) occur at the I/O port, a bi-directional EOS/ESD protection circuit is required to protect components in ICs.